The silicon photonics bottleneck shifts to packaging, with Taiwan seeing a panel-level opportunity.

ChainCatcher report, according to DIGITIMES, at the Semicon Network Summit 2026, industry representatives noted that the bottleneck in the silicon photonics industry has shifted from materials to packaging precision and heterogeneous integration. Marvell’s CTO stated that copper interconnects are nearing their physical limits, making end-to-end optical interconnects inevitable. TNO/Holst Centre highlighted that the real challenge of CPO lies in integrating optical materials such as LiNbO3 and InP with CMOS platforms. TSIA noted that packaging now requires micrometer-level alignment accuracy for optical fibers, and Taiwan holds a globally leading advantage in both chip and packaging technologies. TNO further emphasized that panel-level packaging represents a key opportunity for Taiwan, leveraging its expertise in large-size glass substrate processing to meet the massive demand for data center optical interconnects; however, technological gaps remain in equipment such as chip-to-wafer bonding. Marvell indicated that its reliance on Taiwan’s supply chain for silicon photonics chips is increasing.