Samsung to Deploy High-NA EUV for DRAM Production by 2028

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Samsung announced a partnership announcement with ASML on September 8, 2026, pledging to use High-NA EUV lithography for DRAM mass production by 2028. This on-chain news marks a potential first in the DRAM industry. The move could redefine manufacturing standards if deployed successfully.

Samsung Electronics is betting that the most expensive machines ever built for chipmaking will give it a decisive edge in the memory wars. The company announced an enhanced strategic partnership with ASML on September 8, 2026, committing to deploy High-NA EUV lithography in mass production of DRAM by 2028.

If Samsung hits that target, it would mark the first time any chipmaker has used High-NA EUV technology in the DRAM sector.

What High-NA EUV actually means

EUV lithography, or extreme ultraviolet lithography, is the technology that prints impossibly tiny circuit patterns onto silicon wafers using light with a wavelength of just 13.5 nanometers. “High-NA” refers to a higher numerical aperture in the lens system — rising from 0.33 to 0.55 — which allows the machine to print even finer patterns with better resolution.

The practical benefit for DRAM: fewer manufacturing steps, tighter circuit patterns, and better efficiency. High-NA EUV facilitates single-exposure capabilities, simplifying the previously complex multi-patterning required by older EUV equipment.

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These machines don’t come cheap. Each High-NA EUV tool costs between $350 million and $400 million.

The 12-inch photomask shift

Beyond the headline EUV commitment, Samsung will also participate in an ASML-led initiative to develop 12-inch photomasks, replacing the 6-inch format that has been the industry standard for decades.

Photomasks are essentially the stencils used to transfer circuit designs onto silicon wafers. The shift to 12-inch masks is expected to boost manufacturing productivity by roughly 40%.

Why DRAM before logic chips

The company isn’t planning to use High-NA EUV for its logic and foundry operations until around 2030, when it expects to reach 1nm-class process nodes. Yet it’s targeting 2028 for DRAM.

Samsung CEO Young Hyun Jun framed the partnership in explicitly AI-centric terms, stating that technological innovation across the entire chip value chain is essential in the AI era.

What this means for the semiconductor landscape

Samsung’s announcement puts pressure on rivals SK Hynix and Micron Technology, the other two companies in the DRAM oligopoly that collectively control the vast majority of global DRAM supply. For ASML, the partnership validates the commercial viability of its most advanced product line. ASML is the sole supplier of EUV lithography equipment globally.

TSMC is targeting a 2030 rollout for similar advanced nodes, while Intel has initiated limited applications of High-NA EUV technology. For investors tracking the semiconductor supply chain, the key metric to watch isn’t the announcement itself but Samsung’s capital expenditure trajectory over the next two years. Orders for High-NA EUV tools, facility upgrades, and photomask development spending will all serve as leading indicators of whether the 2028 target is on track.

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