Samsung to Complete 3D Cube-H Development by Early 2027

ChainCatcher report: Samsung Electronics plans to complete the development of its advanced packaging technology, 3D Cube-H, by early 2027, along with its first design kit, followed by evaluations with potential customers. This technology enables vertical stacking of chips through hybrid bonding and is primarily targeted at high-performance AI semiconductors, allowing for stacking of logic chips such as GPUs or integrating logic chips onto memory chips like HBM. Samsung previously developed 3D Cube-T using thermocompression bonding and is now advancing 3D Cube-H with a terminal pitch of approximately 6 micrometers, compared to the minimum terminal pitch of about 25 micrometers in thermocompression-bonded chips. Hybrid bonding directly connects copper materials between chips, enabling smaller terminal pitches, higher connection density, and reduced energy consumption per bit, while also offering distinct thermal characteristics compared to thermocompression bonding.