NVIDIA's Feynman AI Platform Targets Mass Production by 2028 with TSMC A16 and SoIC

ChainCatcher report, according to DIGITIMES, NVIDIA’s next-generation AI platform, Feynman, is targeted for mass production in the second half of 2028, utilizing TSMC’s A16 process with SoIC 3D stacking and CPO technology. While the Rubin generation primarily integrates multiple chiplets with HBM, Feynman further advances toward 3D chiplets, SoIC, and CPO. The report indicates that TSMC is accelerating capacity expansion for these technologies; the original plan aimed for a monthly SoIC capacity of 20,000 wafers by end-2026, but the latest target has been raised to 50,000 wafers per month by end-2027. Construction progress for TSMC’s Jiayi AP7 and Southern Science Park AP8 facilities is also accelerating. AP7 is planned in eight phases: P1 and P2 are currently in equipment installation, P3 and P4 have received construction permits, and P5 through P8 are under ongoing planning. In addition to mass-producing Apple’s WMCM, AP7 will later configure production lines for SoIC, CoPoS, and CPO based on customer demand. NVIDIA has rapidly shifted its R&D and supply chain resources toward the Feynman platform, and the spillover effect on TSMC’s advanced packaging orders continues to expand, with Siliconware emerging as the primary test and assembly partner for NVIDIA’s CoWoS and CPO orders. The NVLink interconnect bandwidth for NVIDIA’s Feynman platform is expected to exceed 1 PB/s, up from 520 TB/s in Rubin Ultra. TSMC’s COUPE technology uses SoIC to integrate EIC and PIC into a 3D optical engine, moving optical-electrical conversion from traditional circuit boards into the packaging architecture itself. Since 2026, NVIDIA has invested over $40 billion in building its AI ecosystem, covering models, wafer manufacturing, data centers, and optical communications.