NVIDIA Delays Multiple AI Rack-Level Architectures; Rubin Ultra Expansion Path Restricted

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According to SemiAnalysis, NVIDIA's Kyber NVL144 rack-level interconnect architecture has been delayed until 2028 due to PCB design challenges. The NVL72x2 back-to-back design has been canceled, and the NVL576 may face delays or limited testing due to CPO technology constraints. The Rubin Ultra roadmap now includes only a dual-chip version, halving its performance. These delays could create a bottleneck for NVIDIA’s large-scale AI expansion, potentially giving alternatives like AMD’s MI500X or Google’s TPU v8i a competitive advantage. NVIDIA will prioritize shipping Oberon Rubin racks to sustain supply chain momentum during this transition.
ME AI message, on July 6, SemiAnalysis reported that NVIDIA’s latest rack-scale interconnect architecture, Kyber NVL144, has undergone major adjustments just three months after its announcement, with its launch now delayed by over 12 months to 2028, primarily due to ongoing manufacturing challenges with its PCB planar design. Additionally, the NVL72x2 back-to-back rack architecture has been canceled. This design originally aimed to enhance pure copper NVLink scalability by deploying two Oberon racks back-to-back, but faced strong market skepticism due to its structural complexity and high operational burden on hyperscale cloud service providers (CSPs), leading to its eventual abandonment. Since CPO (Co-Packaged Optics) technology remains immature, NVIDIA’s larger-scale expansion solutions based on CPO NVSwitch—such as NVL576—may also face further delays or be limited to small-scale pilot production. This means that, prior to CPO maturity, NVIDIA lacks a stable large-scale scale-up solution. Furthermore, the Rubin Ultra product roadmap has changed: the originally planned “quad-chip” version has been canceled, leaving only the “dual-chip” version, with overall system-level performance expected to drop to roughly half of the original plan. These adjustments indicate that NVIDIA’s scale-up capabilities in the Rubin Ultra generation are constrained. With CPO NVSwitch unlikely to be available before the Feynman architecture, competitors such as AMD’s MI500X or Google’s TPU v8i may gain a relative window of opportunity in scaling large-scale training clusters. Meanwhile, NVIDIA is expected to meet market demand during this product transition period and maintain overall supply chain momentum by heavily shipping Oberon Rubin racks and their “Ultra” variants. (Source: MLion)
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