Lam Research just planted a flag in Tualatin, Oregon, breaking ground on a new advanced R&D lab designed to keep pace with the semiconductor industry’s AI-fueled appetite. The facility is one piece of a much larger puzzle: a five-year investment plan exceeding $3 billion to expand the company’s global research infrastructure.
The semiconductor industry is barreling toward a projected $1 trillion in total market size, and Lam (NASDAQ: LRCX) is betting that whoever controls the R&D pipeline controls the future.
What Lam is actually building
The Tualatin groundbreaking, which took place on August 26, is part of an initiative that Lam says will boost its annual experimentation capacity by more than 50% across specialized labs spanning the US, Asia, and Europe.
The company is implementing an integrated 24/7 program designed to compress semiconductor process development cycles by up to 2.5 times.
The new lab will focus on advanced logic, memory, and packaging tools, all of which are essential ingredients for AI and high-performance computing workloads. High-bandwidth memory has become a particular priority.
CEO Tim Archer framed the expansion as a direct response to shifting market dynamics. The memory market, historically cyclical and commodity-like, is being fundamentally reshaped by AI requirements.
Oregon roots run deep
Lam’s presence in Oregon isn’t new. The company has operated in the region since the late 1990s, with sites spread across Tualatin, Hillsboro, and Sherwood.
The new groundbreaking follows a separate $65 million investment that Lam completed in November 2025. That project, known as Building G, added a 120,000-square-foot facility with up to 700 workspaces in Tualatin.
The bigger semiconductor picture
Every major chipmaker, from TSMC to Samsung to Intel, is racing to develop next-generation architectures optimized for AI workloads. That race creates downstream demand for the companies that build fabrication equipment, and Lam is one of the largest players in that space. Its tools are used in critical steps like etching and deposition, processes that define the physical structures on a silicon wafer at the nanometer scale.
Archer’s emphasis on new chip architectures driven by AI innovations points to a market moving beyond incremental improvements. The transition from traditional scaling to more complex 3D structures and heterogeneous integration means equipment makers need to solve problems they’ve never faced before.
The 2.5x compression in development cycles that Lam is targeting with its 24/7 program could become a genuine competitive moat if achieved at scale.