ChainThink reports that, according to a client report from SemiAnalysis citing market sources, Google is collaborating with AMD to develop one of the products in its 10th-generation TPU.
If the collaboration moves forward, this would be AMD’s first true involvement in a custom AI ASIC project. The report states that Google has nine generations of TPU development experience and has long relied on Broadcom for actual silicon design;
The key attraction of this partnership lies in AMD’s CPU IP, advanced packaging, and interconnect technologies.
The report specifically notes that Google and its customers are driving the integration of CPU cores within TPU packages to meet the demands of CPU-intensive workloads such as reinforcement learning.
Traditional LLM training still relies primarily on accelerators, but inference and reinforcement learning for agent-based models require more general-purpose computing resources to operate alongside accelerators.
Google's recent hardware configurations reflect this trend: TPU 8i systems for inference and reinforcement learning workloads, with one Google Axion CPU paired for every two TPUs;
The 7th-generation TPU servers pair one Intel Xeon processor with every four TPUs. Reports suggest that a 1:1 ratio between CPU and accelerator may be optimal in certain scenarios.