AMD acquires Taalas to embed AI model weights in silicon for inference

Article by Xiao Bing

On August 6, AMD announced the acquisition of Toronto-based chip company Taalas, with the transaction price undisclosed. This startup, founded in 2023 and having raised a total of $219 million, did something that sounds slightly insane: it permanently burns AI model weights directly into the chip’s metal layers to create specialized chips capable of running only one model.

GPUs work by storing model parameters in high-bandwidth memory (HBM) and repeatedly moving data in and out of computational units during inference. This "movement" consumes significant energy and time, a bottleneck known in the industry as the "memory wall." Taalas eliminates this movement entirely by embedding weights directly into the chip’s transistors, integrating storage and computation into a single unit.

The cost is that this chip can only run one model, but the benefit is a magnitude-level improvement in speed and energy efficiency.

Taala's technical verification chip, HC1, is built on TSMC's 6nm process, features a die size of 815 square millimeters, and contains 53 billion transistors. It integrates Meta's Llama 3.1 8B model.

HC1 benchmark data: approximately 17,000 tokens/second per user. For comparison, the Nvidia H200 achieves about 230 tokens/second and the H100 about 150 tokens/second on the same model—73 times faster, with only one-tenth the power consumption.

A clearer economic breakdown: Taala’s reported inference cost is approximately $0.0075 per million tokens (Llama 8B), while GPU solutions range from $0.20 to $0.49. Each HC1 card consumes 250W; a standard air-cooled rack housing 10 cards requires only 12–15 kW, with no liquid cooling needed, whereas GPU racks typically consume 120–600 kW.

Forbes analyst Karl Freund evaluated in February: “10 times faster than the fastest inference platform (Cerebras Wafer-Scale Engine) and two orders of magnitude faster than GPUs.”

However, there are several important caveats. HC1 uses Taalas’s proprietary 3-bit data format paired with 6-bit parameters, resulting in extremely aggressive quantization, with deterministic quality degradation on complex reasoning tasks. The figure of 17,000 tokens/second comes from a vendor benchmark using 1K input and 1K output and does not reflect real-world production performance. Moreover, Llama 3.1 8B is a model released in mid-2024, and its 8B-parameter quantized version can even run on a Raspberry Pi 5. HC1 demonstrates the potential of the architecture, not the competitiveness of a mature product.

Flashing the model onto the chip raises the most intuitive question: What happens when the model is updated? Is the chip then obsolete?

Taalas's response: No, it won't become obsolete. Traditional ASIC design cycles take over two years. Taalas has developed an automated design process that allows new models to be compiled into new chips by modifying only a small number of metal masks at the chip's top level, reducing the cycle to approximately eight weeks. The company's cost model includes provisions for three chip updates over a four-year lifecycle.

This answer can alleviate some anxiety, but it cannot eliminate it entirely.

The flexibility of GPUs lies in the fact that the same card can run Llama today, Claude tomorrow, and a new, unreleased model the day after. Taalas’s chips cannot do this. If a customer needs to serve multiple models simultaneously—which is extremely common in production environments—they would require a different chip for each model, increasing the complexity of inventory management and operations.

HC2 is currently in development, targeting a model with approximately 20 billion parameters and improved precision using 4-bit floating-point. Taala originally planned to support state-of-the-art models by the end of 2026.

AMD's acquisition has enabled synergy between the Instinct GPU product line and the Helios rack system, allowing customers to use GPUs for dynamic, varied workloads and Taalas chips for stable, high-frequency single-model inference.

AMD's acquisition of Taalas is the latest in a wave of acquisitions in the inference chip industry over the past eight months.

In December 2025, Nvidia acquired Groq for $20 billion, securing its SRAM-based low-latency inference architecture.

In May 2026, Cerebras went public with a market capitalization of approximately $56 billion, becoming the largest tech IPO since Snowflake in 2020.

In June, Etched ended its more than two-year stealth period, announcing that its first Transformer-specific chip had successfully taped out on TSMC’s N4P process, with over $1 billion in customer contracts secured. Intel is reportedly in advanced talks to sign a letter of intent to acquire SambaNova, while Qualcomm is engaging with Tenstorrent.

These transactions point to the same conclusion: reasoning is becoming the main battleground for AI compute spending.

Industry forecasts predict that by 2026, inference will account for two-thirds of AI computing spending, and by 2030, dedicated inference ASICs could capture 45% of the inference market. Nvidia’s GPUs still dominate the training segment, but in inference, their general-purpose architecture faces mounting challenges from specialized chips across multiple fronts.

Taalas sits at the most extreme end of this spectrum: it abandons even the generality of a "class of models" and instead creates a dedicated chip for a "single model."

Groq bypasses the memory wall by replacing HBM with SRAM, Cerebras brute-forces its way through using wafer-scale area, Etched optimizes solely for the Transformer architecture, and Taalas makes a bolder bet: that AI models will eventually stabilize, much like communication protocols converge to a few standards. When models no longer change monthly, manufacturing dedicated chips for the few most popular models becomes economically viable.

AMD Senior Vice President Vamsi Boppana stated in the announcement that the acquisition aims to provide customers with "the optimal computing solution for every AI workload." This translates to a competitive strategy: GPUs handle flexibility, while Taalas chips deliver maximum efficiency, allowing customers to combine them as needed.

Whether this combination logic holds depends on one core assumption: whether the update cycle of AI models will slow down.

If large models continue to receive architectural updates every few months, embedding weights directly into silicon is like pouring concrete into quicksand—the chip won’t even recoup its costs before the model becomes obsolete. But if model capabilities begin to converge and it becomes standard for leading models to serve reliably for one to two years, then specialized chips like Taalas’s will become as commonplace as baseband chips in the telecommunications industry—transitioning from wild experiments to obvious, default choices.

Looking back over the past 12 months, the pace of model updates has indeed undergone subtle changes. The intervals between Llama 3.1, 3.2, and 4 have lengthened, while the architectural shifts between GPT-4, GPT-4o, and GPT-5 have narrowed. More new models are now being developed through distillation, quantization, and fine-tuning of existing architectures, indicating a slowdown in base model iteration.

If this trend continues, Taala has bet correctly.