What problem do CPOs solve? AI training and inference clusters are not just compute-bound but also fundamentally networking-bound. As the GPU clusters scale into the tens or hundreds of thousands of GPUs, three walls appear simultaneously: 1. The bandwidth wall: each new GPU generation (H100 → B200 → Rubin) needs dramatically more I/O bandwidth per chip to keep the compute fed. Interconnect bandwidth has to grow faster than compute FLOPs (floating-point operations per second, which is a unit used to measure a computer's processing power for complex math), or you get idle GPUs waiting on data. 2. The power wall: A gigawatt-scale AI data center concept, as described by Nvidia's Jensen Huang, envisions facilities consuming a gigawatt or more of power, and every watt spent moving bits between chips is a watt not spent computing. Conventional electrical/optical signaling burns a lot of power just getting data in and out of a package. 3. The reach wall: copper interconnects (NVLink, PCIe traces) become lossy + power-hungry past a few meters at the signaling speeds AI needs (100G+ per lane). Optics don't have this distance penalty, but converting between electrical and optical domains costs power and adds components. Co-packaged optics is the answer to all three at once: instead of converting data to light at the edge of a board, you move the optical engine as close as physically possible to the silicon that's generating the data. That means on the same package substrate as the switch ASIC or GPU itself.