Morgan Stanley Report: CoWoS Demand to Double by 2027, Driven by AMD and ASICs in AI Chip Growth

Written by: Rita

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Morgan Stanley released its latest AI supply chain report on July 8, providing a comprehensive update on CoWoS advanced packaging allocations and ASIC dynamics for 2027. The report’s core assessment is that global CoWoS demand will reach 2.694 million wafers in 2027, a 93% increase from 1.394 million wafers in 2026. NVIDIA remains the largest shareholder (1.222 million wafers, accounting for 45%), but AMD is emerging as the key variable with a 308% growth rate. More importantly, CPUs are now adopting CoWoS packaging at scale, with AMD’s Venice CPU shipments projected to reach 6.75 million units in 2027—signaling a critical shift in AI compute demand from GPUs to a broader range of chip categories. The so-called “inventory” issue with Blackwell chips has been confirmed as supply chain buffer and will be fully absorbed by the end of 2026.

Morgan Stanley confirmed in its report that AMD’s 2027 CoWoS allocation will remain at 240k wafers, representing an approximately 85% increase from 130k wafers in 2026. The MI400 series will be divided into two versions: the MI455, the standard model featuring 2 compute dies and 12 HBM4 12hi chips, paired with the Helios rack (18 CPUs + 72 GPUs), with primary customers including Microsoft, AWS, and Oracle; and the MI450, a customized version for Meta with half the chip scale, featuring 1 compute die and 6 HBM4 12hi chips. Morgan Stanley expects shipments of 1 million MI455 units and 500,000 MI450 units in 2027.

However, Morgan Stanley also cautioned that there is a risk of execution delays—AMD previously reduced its CoWoS orders in 2026. This is a warning sign: even with clear demand, aligning capacity with yield remains uncertain.

Venice is AMD's first CPU to use CoWoS packaging, with CoW production concentrated at packaging and testing facilities such as ASE/SPIL, Amkor, and Powertech. Morgan Stanley estimates that total CPU chip shipments in 2027 could reach 5.7 to 6 million units, far exceeding the 1 million units in 2026. The packaging demand for 6.75 million Venice CPUs indicates that CoWoS applications are rapidly expanding from AI accelerators to mainstream server CPUs.

This is a clear positive signal for the advanced packaging equipment supply chain. Continued tightness in CoWoS capacity will accelerate the domestic substitution of advanced packaging equipment in China. Leading packaging and testing companies such as JCET and Tongfu Microelectronics are expected to benefit from the spillover of OSAT capacity.

According to Morgan Stanley’s industry survey, KYEC’s Q3 2026 revenue may rise nearly 10% quarter-over-quarter, below the previous expectation of 15%, primarily due to minor delays in Rubin and Sunfish, along with reduced orders for MediaTek’s smartphone SoCs. However, full-year Sunfish shipment volume remains unchanged at 960,000 units, with shipments concentrated in Q4 2026 or Q1 2027 and no order cuts. The Q4 2026 shipment schedule for Zebrafish remains unchanged.

The latency of Google's TPU extends the time window for China's AI chip supply chain. Domestic AI chip companies such as Cambricon and Hygon still have room to catch up.

Morgan Stanley has provided a clear conclusion on the Blackwell chip inventory issue: the so-called "inventory" is actually a supply chain buffer that will be fully absorbed within 2026, eliminating any concern about inventory buildup. Blackwell shipments are expected to reach 5.4 million units in 2026, with sufficient chip production to meet demand for Grace Blackwell NVL72 in H2 2026.

Rubin is the true growth driver. Morgan Stanley expects shipments of Rubin and Rubin Ultra chips to approach 7 million units by 2027, with up to 90,000 Rubin NVL72 server racks. Rubin will begin ramping in Q3 2026, with rack shipments starting in Q4 2026.

For A-share investors, Rubin’s increased production volume means sustained orders for China’s AI supply chain segments, including optical modules, PCBs, and thermal management. The earnings visibility of companies such as Zhongji Xuchuang and Shenghong Technology will improve alongside Rubin’s scaling up.

The core logic of Morgan Stanley’s report is that competition in AI chips is shifting from “who can design the best chip” to “who can secure sufficient advanced packaging capacity.” CoWoS capacity is expected to more than double from 1.394 million units in 2026 to 2.694 million units in 2027, but demand is growing even faster. NVIDIA, AMD, Google, Amazon, and Broadcom are all competing fiercely for CoWoS capacity.

The most significant structural shift in this round of capacity competition is the large-scale adoption of CoWoS by CPUs. AMD’s projected shipment of 6.75 million Venice CPUs in 2027 signals that CoWoS applications are expanding from AI accelerators to server CPUs, providing a clear growth signal for the advanced packaging equipment supply chain.

Three dimensions warrant ongoing monitoring: NVIDIA’s Rubin is the largest single incremental driver in 2027, AMD’s Venice CPU represents a structural increase in CoWoS demand, and Google’s TPU timeline creates room for domestic AI chips to catch up. Combined, these three factors suggest AI supply chain momentum can be sustained through at least 2028.

Disclaimer

This article is a compilation and interpretation by Chaoxiang Research of a third-party brokerage research report (Morgan Stanley, July 8, 2026). The ratings, target prices, earnings forecasts, and related judgments cited herein reflect the views of the brokerage's analysts and represent the position of their respective institution, not the views of Chaoxiang Research, nor do they constitute any investment advice.

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