Cerebras Systems brought its biggest flex to Singapore this week. At the SuperAI 2026 conference, the company showcased its third-generation Wafer Scale Engine, a chip containing 4 trillion transistors and 900,000 AI-optimized cores, all etched onto a single piece of silicon.
To put that transistor count in perspective: Nvidia’s H100, the current workhorse of AI data centers, contains roughly 80 billion transistors. The WSE-3 has 50 times that number.
What Cerebras actually built
The WSE-3 is fabricated on a 46,225 mm² silicon wafer using TSMC’s 5nm process technology. Where most chips are cut from wafers into individual dies, Cerebras uses the entire wafer as one massive processor.
The result is a chip that delivers 125 petaflops of peak AI performance. It also packs 44 GB of on-chip SRAM, which matters because memory bandwidth is often the real bottleneck in AI workloads, not raw compute.
Cerebras reports that the WSE-3 can process 981 tokens per second on certain large language models. The company says that’s up to 6.7 times faster than leading GPU cloud solutions, based on independent testing.
The WSE-3 was originally launched in March 2024, with Cerebras claiming it doubled the performance of its predecessor, the WSE-2, while maintaining the same power consumption and price point. The SuperAI showcase gave the company a high-profile stage to demonstrate the technology to more than 10,000 conference attendees.
Andy Hock, Cerebras’ Chief Strategy Officer, was among the presenters at the two-day event held June 10-11 in Singapore.
From startup to public company
Cerebras completed its IPO in May 2026, a listing that financial analysts have called the largest tech IPO of the year. As a publicly traded entity trading under the ticker CBRS, every benchmark and every customer win gets dissected by analysts with quarterly earnings expectations.
What this means for investors
No cryptocurrency projects or tokens are directly tied to the WSE-3 announcement. Some speculative tokenized representations of CBRS stock exist on certain platforms, but those are derivative products, not official partnerships.
Cerebras’ wafer-scale approach also introduces manufacturing risk that conventional chipmakers don’t face. Using an entire wafer as a single chip means that defect tolerance and yield management work fundamentally differently. One flaw in the wrong place on a traditional wafer ruins one chip out of dozens. On a wafer-scale engine, the redundancy engineering has to be far more sophisticated.